1. Field of the Invention
The present invention relates to a 1-bit D/A conversion circuit of an over-sampling type D/A converter.
2. Description of the Related Art
In coding an analog signal into digital data based on a sampled value, it is known from the Nyquist theorem that if a sampling frequency twice a signal frequency band fB is set, the information contained in the original signal is not lost. For this reason, a sampling frequency fs of a general D/A converter is set to be about 2.2 to 2.4 times the signal frequency band fB.
The conversion precision of a D/A converter, therefore, can be considered to be determined by a conversion bit count p (resolving power), disregarding element precision.
Recently, however, an over-sampling type D/A converter which allows high conversion precision with a small conversion bit count p has been developed and put into practice. A maximum value (S/N).sub.MAX of the S/N ratio of a simple over-sampling type D/A converter is given by the following equation (1): EQU (S/N).sub.MAX =(3/2)2.sup.2P {fs/(2 fB)} (1)
According to equation (1), the S/N ratio of the D/A converter improves by 6 dB as the bit count p is increased by one bit, and improves by 3 dB as the sampling frequency fs is doubled. It is apparent from this relationship that the degree to which the S/N ratio improves when the sampling frequency fs is quadrupled is equal to that when the bit count p is increased by one bit. In other words, the conversion precision remains the same when the bit count p is decreased by one bit every time the sampling frequency fs is quadrupled. In an over-sampling type D/A converter, therefore, sufficiently high conversion precision is obtained even with a small bit count p by setting the sampling frequency fs to be sufficiently higher than the signal frequency band fB.
Currently, in a general audio D/A converter, the sampling frequency fs is set to be 44.1 kHz, and the bit count p is set to be 16 bits. Assume that this conventional D/A converter is of an over-sampling type and the bit count p is one bit. In this case, the required sampling frequency (to be referred to as an over-sampling frequency fos hereinafter) is 47.times.10.sup.12 Hz from equation (1) above. It is, however, difficult to realize the frequency fos of 47.times.10.sup.12 Hz.
Under the circumstances, various methods of realizing more practical over-sampling type 1-bit D/A converters have been developed. One of such D/A converters is a D/A converter using .SIGMA..DELTA. modulation. Such a D/A converter is disclosed in Peter J. A. Naus et al., "A CMOS Stereo 16-bit D/A Converter for Digital Audio", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol sc-22. No. 3, pp. 390-394, June 1987.
An over-sampling type D/A converter using .SIGMA..DELTA. modulation will be described below.
Multi-bit digital data input at the sampling frequency fs is up-sampled first by a digital filter at a frequency two to eight times the frequency fs. Subsequently, the data is over-sampled by an interpolation filter or the like at a frequency n times (normally, n=32 to 384) the frequency fs. In this case, "n" is the sampling rate and defined as n=fos/fs.
The multi-bit digital data is input to a .SIGMA..DELTA. modulator at such an over-sampling frequency nfs (=fos) to be converted into 1-bit digital data of the over-sampling frequency nfs.
FIG. 1 shows a typical arrangement of the .SIGMA..DELTA. modulator.
In the system of this modulator, if the transfer function H(z) of a loop filter is given by EQU H(z)=1-(1-z.sup.-1).sup.q ( 2)
then, the transfer characteristic Y(z) of this qth-order .SIGMA..DELTA. modulator can be expressed by equation (3): EQU Y(z)=X(z)+(1-z.sup.-1).sup.q .multidot.E(z) (3)
In equation (3), E(z) is the re-quantization noise generated by a 1-bit quantizer Q and assumed to normally have a flat frequency characteristic. In order to obtain the frequency characteristic of a coefficient (1-z.sup.-1).sup.q of E(z), let
z=e.sup.j.omega.T (T=1/(nfs)) PA1 (N is the pulse count per second)
Then, ##EQU1## Therefore, if the signal frequency band fB is set to be sufficiently lower than the over-sampling frequency nfs, the noise is reduced in a low-frequency region, and the S/N ratio in the signal band improves by 3.times.(2q+1) dB every time the over-sampling rate n is doubled. If, for example, a second-order .SIGMA..DELTA. modulator is used, q=2, and the S/N ratio improves by 15 dB every time the over-sampling rate n is doubled. In order to obtain conversion precision as high as that of a 16-bit D/A converter, the over-sampling rate n may be set to be about 100, which is a sufficiently practicable value.
In an over-sampling type D/A converter, in order to maximally take an advantage of a decrease in the resolving power (bit count) p owing to over-sampling, the output from the .SIGMA..DELTA. modulator is a 1-bit output. For this reason, the resolving power p of the D/A conversion circuit for converting 1-bit data into an analog signal is one bit, and the problem of a linearity error due to variations in the characteristics of elements can be solved.
The following problems, however, remain unsolved: bluntness of the waveform of a signal output from the 1-bit D/A conversion circuit, distortion caused by unwanted high-frequency components and the like, and a drop in S/N ratio due to unwanted radiation. Various attempts have been made to solve such problems.
The output (1-bit data) from the .SIGMA..DELTA. modulator is an NRZ (Non Return to Zero) signal and contains a signal component in its low-frequency region. In a 1-bit D/A converter, in order to ensure sufficiently high performance and remove unwanted high-frequency components, 1-bit data is temporarily wave-shaped into a pulse output suitable for an intended application purpose. Thereafter, unwanted high-frequency components are removed from the pulse output by an analog filter to obtain an analog signal.
A D/A converter using the RZ (Return to Zero) signal as the above pulse output is disclosed in S. Aoshima, "The design concept and application technique of the original 1 bit DAC", Radio Technique, Aieh publication Co. Ltd. in Japan, pp. 152-157, November 1990.
A D/A converter using the PRZ (Polar Return to Zero) signal is disclosed in Peter J. A. Naus et al., "A CMOS Stereo 16-bit Converter for Digital Audio", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol sc-22. No. 3, pp. 390-394, June 1987.
Such a D/A converter is also disclosed in Renee G. Lerch et al., "A Monolithic .SIGMA..DELTA. A/D and D/A Converter with Filter for Broad-Band Speech Coding", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol sc-26. No. 12, pp. 1920-1927, December 1991.
As described above, in an over-sampling type 1-bit D/A converter using .SIGMA..DELTA. modulation, the S/N ratio can be improved by increasing the sampling rate n. In addition, since D/A conversion is performed with a resolving power of one bit, high element precision is not required, and hence this D/A converter is suitable for an integrated circuit.
However, in the 1-bit D/A conversion circuit, of the over-sampling type 1-bit D/A converter, which is designed to convert 1-bit data into an analog signal, the problems of bluntness and distortion of the waveform of an output signal and a drop in S/N ratio due to unwanted radiation still remain unsolved.
FIG. 2 is a circuit diagram showing a 1-bit D/A conversion circuit using the NRZ signal as a pulse output.
As shown in FIG. 3, there are deviations a between an ideal waveform and the waveform of an output from a D/A conversion circuit of this type because the rising/falling speed of the output rectangular wave are finite. For the sake of simplicity, assume that the output rectangular wave rises/falls linearly, and the leading- and trailing-edge inclinations are .DELTA./t1 and -.DELTA./t2, respectively. In this case, owing to the deviations from this ideal waveform, a DC offset represented by the following equation is produced: EQU DC=(t2-t1)N/2
This offset is proportional to the pulse count per second. For this reason, as shown in FIG. 3, if digital data input to the D/A conversion circuit is a signal near 0, the DC offset increases. This is because the pulse count per unit time is large.
If the input data is a signal near qfull scale (to be referred to as FS hereinafter), since the pulse count is small, transfer characteristics like those shown in FIG. 4 are obtained. As a result, secondary distortion is produced.
This secondary distortion can be canceled if a differential scheme is employed, as shown in FIG. 5. It is, however, difficult to completely cancel the distortion because of variations in the characteristics of elements. That is, distortion remains unremoved more or less. In addition, owing to the differential scheme, the number of pins increases if the analog filter is not incorporated in an LSI. Furthermore, since the numbers of capacitors and resistor increase, the cost increases. Even if the analog filter is incorporated in an LSI, since the total number of capacitors and resistors increases, the chip cost increases.